1. Field of the Invention
The invention relates to an electronic device and a method for fabricating the same, and more particularly, to a semiconductor device and a method for fabricating the same.
2. Description of Related Art
A silicide layer has the advantages of, for instance, high melting point, high stability, and low resistance, and is currently widely applied to integrated circuits. Due to the gradual miniaturization of integrated circuit techniques, the linewidth, the contact area, and the junction depth . . . etc. are gradually becoming smaller. To effectively increase the performance quality of the devices, lower resistance, and reduce signal transmission delay caused by resistance and capacitance, a polycide gate is often used to replace the known polysilicon gate such that a silicide layer can be used to effectively reduce junction resistance.
The current salicide process includes covering a metal layer on the surface and the sidewall of a patterned polysilicon such that the salicide process can be performed from three sides at the same time. However, the silicide layer formed by the method often generates necking or line bending on the contour. Therefore, the phenomenon of peeling or fracture readily occurs to the silicide layer. Moreover, although a uniform silicide layer can be formed by performing the salicide process on only the top surface, the thickness of the resulting silicide layer is too thin and is therefore unsatisfactory. The resistance of the silicide layers and the interface thereof formed by the two processes above is higher.
Moreover, when various semiconductor devices are integrated on the same chip, the silicide layers of the devices having various linewidths are also different from one another. For instance, in an integrated device having both a narrow linewidth and a wide linewidth, if a silicon-containing conductive layer having a narrow linewidth is completely silicidated, then poor silicide is generated for a silicon-containing conductive layer having a wide linewidth due to insufficient time of the salicide process. On the other hand, if the silicon-containing conductive layer having a wide linewidth is completely silicidated in a self-aligned manner, then necking or bending occurs to the silicon-containing conductive layer having a narrow linewidth due to over-silicidation, and the phenomenon of peeling or fracture may even occur. Therefore, how to completely silicidate silicon-containing conductive layers having different linewidths without causing necking or bending to the silicide layer or the generation of poor silicide is an issue that needs to be solved.